4.Method to reduce seed layer topography in BICMOS processes, US patent 7566919

3. Formation of deep Via Airgaps for three dimensional wafer to wafer interconnect, US patent 7338896

2. Formation of deep trench airgaps and related applications, US patent 7396732

1. Method for forming macropores in a layer and products obtained thereof, US patent 7060587

Choose a Background

Aurora Borealis Horsehead Eagle Nebula Orion Nebula Rho Ophiuchi Nebula Joke Gray background Warm background Warm Wave Background Warm Wavy Background Pulsing background
Contact

Contact

Patents

Patents

Publications

Publications

Friends

Friends

Art

Home

Home